Welcome on my personal website.


14 June 2020

New Blitter version (v2.1) for the Jaguar FPGA project :
- Added an input fifo for registers, giving up to 256 pending command
- Better Source/Destination Memory Read management, increasing throughput up to 15x versus the v2.0
- Resolved bugs in sub 8bit mode
- Made some improvement in the code


19 April 2020

New Object Processor version (v2.1) for the Jaguar FPGA project :
- Better OP List cache implementation
- Better OP List parsing performance
- Removed Object WB (no more need to refresh the list each frame)
- YPOS is now implemented as signed for bitmap objects : this implies that vertical clipping is now fully supported
- Added support of 4bpp Planar Object
- Increase performance by ignoring objects (scaled & unscaled) with all pixels outside of the visible area


03 Sept 2019

Added my Lynx2 Power Module project.


16 May 2015

Many bugs have been resolved on the Jaguar FPGA project.


22 February 2015

Added my ST2Jag Optimized code from the Orion_'s original source into the Jaguar section.


7 December 2014

Added my Jaguar FPGA project in FPGA section.


2 December 2013

The second JagCFv3 is now complete.
Need now to try it and finish the firmware. :)


24 November 2013

I'm soldering another JagCFv3 to verify everything is working.
50% of it is done. (arround 100 components on 204)
It takes more times than I remind :/
The other 50% will be done next weekend.


25 October 2013

Added :
- "Fixing the Jaguar after using a wrong PSU" in Jaguar section
- "JagCFv3" in FPGA/CPLD section
- demos video of the JagCFv2 in FPGA/CPLD section
- "External Links" section


23 October 2013

Added some Electronic and FPGA stuff.


20 October 2013

New Website. In construction.